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There is a substantial amount of detail to be added, but if you just want to skim through some industry documentation the International Semiconductor Roadmap for Semiconductors describes a lot of the challenges involved in producing leading edge process products. This is from the working group that a lot of our companies participate in to coordinate what everybody will need from tool vendors and by when (e.g. when everybody wants to start pushing for 450mm wafers all the tools need to already be able to accommodate a larger wafer).

http://www.itrs.net/Links/2013ITRS/Summary2013.htm

The papers themselves as well as the models are all very interesting if a bit occasionally dry.

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