> I'm thinking this would be the case as well on a tablet, unless the flash is in a bus topology already.
There is no speed difference between 1 or 2 chips in this context, they are just treated as separate banks and mapped to different memory addresses controlled by the flash memory controller in the SoC.
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> I'm thinking this would be the case as well on a tablet, unless the flash is in a bus topology already.
There is no speed difference between 1 or 2 chips in this context, they are just treated as separate banks and mapped to different memory addresses controlled by the flash memory controller in the SoC.