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Comment on Linear, symmetric, self-selecting 14-bit molecular memristors (2023)parent

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But wasn't the potentially transformative market intended to be "persistent DRAM" for instant-on devices removing the distinction between memory and storage, requiring DRAM-like speed rather than NAND-like speed ?

I recall their early R/W speed performance projections being far faster than what they ever achieved with Optane drives.

The products that used a PCIe X4 interface with a block storage protocol layered on top were never intended to deliver the best performance the memory was capable of.

Sure, but Intel never got to the point of packaging it as memory (DIMMs) since the performance wasn't there.

Interesting - I wasn't aware, but even avoiding the PCI bus the performance must have been lacking as that link talks of "memory tiering". I guess this was "mid tier" somewhere between SSD and DRAM, which is a bit of a no-mans land especially in terms of conventional systems architecture ... really just a fast type of storage, or storage cache (a bit like a hybrid SSD-HDD drive).

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