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Comment on Linear, symmetric, self-selecting 14-bit molecular memristors (2023)parent

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Interesting - I wasn't aware, but even avoiding the PCI bus the performance must have been lacking as that link talks of "memory tiering". I guess this was "mid tier" somewhere between SSD and DRAM, which is a bit of a no-mans land especially in terms of conventional systems architecture ... really just a fast type of storage, or storage cache (a bit like a hybrid SSD-HDD drive).

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