Commonly, to perform something like an arbitrary width addition, these CPUs have a carry flag that is set if an operation overloads, so that the carry can be added into the next addition. This way you can simply chain simple 8-bit additions to get the desired operation width. For example, a 16-bit addition (0x5555 + 0x1234 on 6502

    clc
    lda a
    adc b
    sta res
    lda a+1
    adc b+1
    sta res+1

    a:
        .byte $55, $55

    b:
        .byte $34, $12

    res:
        .byte $00, $00 ; reserved for result