ASIC. The timing will be better. Less power will be burned.
The only thing an FPGA wins on is NRE (non-recurring engineering).
The real problem is that the giga-sample DAC's/ADC's aren't willing to speak one of the actual high-speed interfaces or put a DSP directly on the ADC/DAC. So, everybody needs to use an FPGA to shoehorn the data into a useful form.
If somebody put an actual DSP on their ADC/DAC, FPGA's would evaporate for this application like they have evaporated for so many others.
Any FPGA application with volume eventually gets subsumed by special purpose hardware on a microcontroller. For example, people used to use FPGA's for PWM, motor control, etc. Now those blocks are standard on microcontrollers.
Comments
ASIC. The timing will be better. Less power will be burned.
The only thing an FPGA wins on is NRE (non-recurring engineering).
The real problem is that the giga-sample DAC's/ADC's aren't willing to speak one of the actual high-speed interfaces or put a DSP directly on the ADC/DAC. So, everybody needs to use an FPGA to shoehorn the data into a useful form.
If somebody put an actual DSP on their ADC/DAC, FPGA's would evaporate for this application like they have evaporated for so many others.
Any FPGA application with volume eventually gets subsumed by special purpose hardware on a microcontroller. For example, people used to use FPGA's for PWM, motor control, etc. Now those blocks are standard on microcontrollers.
I'd LOVE to make an asic, but we're a small lab and don't have that much to spend.
Exactly. It's not that an FPGA is better, more flexible, faster, etc. It's that you don't have the money for the NRE on an ASIC.
That is EXACTLY the reason to use an FPGA. I use them all the time for projects like that.
This is different from the software people who want a magically flexible brain for generic tasks.