Comment on The C10M problemparentComments−nkurz12yYes, if you don't want all interrupts to handled by CPU0 you'll need a different approach. But doing anything else may be more difficult than it sounds. Do you know if the bug mentioned here is fixed?http://serverfault.com/questions/380935/how-to-ban-hardware-...http://code.google.com/p/irqbalance is 403 for me and I haven't been able to check.−rdtsc12ySetting IRQ affinity for network controllers to either follow or not follow the "high priority" processes seems to do the trick.I usually do stuff described here:https://cs.uwaterloo.ca/~brecht/servers/apic/SMP-affinity.tx...And sometimes following ends up better (same cache), sometimes isolating ends up being better.
Comments
Yes, if you don't want all interrupts to handled by CPU0 you'll need a different approach. But doing anything else may be more difficult than it sounds. Do you know if the bug mentioned here is fixed?
http://serverfault.com/questions/380935/how-to-ban-hardware-...
http://code.google.com/p/irqbalance is 403 for me and I haven't been able to check.
Setting IRQ affinity for network controllers to either follow or not follow the "high priority" processes seems to do the trick.
I usually do stuff described here:
https://cs.uwaterloo.ca/~brecht/servers/apic/SMP-affinity.tx...
And sometimes following ends up better (same cache), sometimes isolating ends up being better.