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Comment on Why Registers Are Fast and RAM Is Slowparent

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Most ARM SoCs have a few hundred kilobytes of "internal RAM" (which is obviously SRAM) used mainly by the ROM and bootloader before the memory controller is initialized and can usually be accessed with the same latency as the L2 cache.

It's usually unused once the kernel has started but it can be mapped by the kernel later on if there's a use for it.

Modern x86 chips generally allow the onboard cache to be used as RAM during early boot for the same reason, too.

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