Comment on The Belt CPU ArchitectureparentComments−Scaevolus13yA careful compiler could avoid WARs more easily in 3AC than 2AC (by spacing reuse of registers), so an architecture without renaming could still extract ILP.It's not a general or optimal solution, though.
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A careful compiler could avoid WARs more easily in 3AC than 2AC (by spacing reuse of registers), so an architecture without renaming could still extract ILP.
It's not a general or optimal solution, though.