On more complex systems there is a pretty good chance you will end up with locked up hardware if your ISR is long enough.
That is true of all such systems, from MCUs to the greatest CPUs ever made, and all prevailing software stacks running on them. Nothing about RTIC precludes servicing interrupts in a timely manner. It is based on a mathematical model of concurrency called Stack Resource Policy (SRP) and is entirely capable of reliably implementing whatever interrupt regime you imagine your "complex" system requires, with zero risk of priority inversion.
prioritization is a job for the OS, not the hardware
So say you. The long and storied history of fragility and failure related to scheduling and interrupt handling suggests there is opportunity for greater rigor than the conventional muddle you assert as best.
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That is true of all such systems, from MCUs to the greatest CPUs ever made, and all prevailing software stacks running on them. Nothing about RTIC precludes servicing interrupts in a timely manner. It is based on a mathematical model of concurrency called Stack Resource Policy (SRP) and is entirely capable of reliably implementing whatever interrupt regime you imagine your "complex" system requires, with zero risk of priority inversion.
So say you. The long and storied history of fragility and failure related to scheduling and interrupt handling suggests there is opportunity for greater rigor than the conventional muddle you assert as best.