Yep, you compare chips on the same level of silicon process.
I was curious to see how far RISC-V still have to go from a microarchitecture stand point, but even in the same silicon process level, there are other things to take into account: the RISC-V compiler support, and something which is really new: since RISC-V is a non-IP-lock worldwide standard, assembly writting is much more a reasonable thing.
And not just the same level of silicon process, as with a reference point, it is possible to further extrapolate using knowledge of differences between process nodes.
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We can compare performance with other TSMC N6 designs. Even more so if we also know the area and power.
This isn't some U74. This is P870. Its published performance data is no joke.
Yep, you compare chips on the same level of silicon process.
I was curious to see how far RISC-V still have to go from a microarchitecture stand point, but even in the same silicon process level, there are other things to take into account: the RISC-V compiler support, and something which is really new: since RISC-V is a non-IP-lock worldwide standard, assembly writting is much more a reasonable thing.
And not just the same level of silicon process, as with a reference point, it is possible to further extrapolate using knowledge of differences between process nodes.
Knowing it is TSMC N6 unlocks at least this much.