The latest from Huawei (which is probably the company to watch here) is an idea called "logic folding" which will squeeze more juice out of DUVL by 3D-stacking logic chips.
So far they have announced road maps and benchmarks for their upcoming products using this. A new Kirin-series phone/laptop chip and an Ascend AI accelerator - stated performance comparable to leading US products made with EUVL.
[Shanghai, China, May 25, 2026] Today, at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS), He Tingbo from HUAWEI delivered a keynote speech titled "New Semiconductor Path in Practice". In her speech, she presented the Tau (τ) Scaling Law, a new principle for guiding the future development of the semiconductor industry. This law proposes replacing geometric scaling with time (τ) scaling as a new guiding principle for the evolution of both semiconductors and electronic systems. Based on this principle, innovative technologies such as LogicFolding can be used to continuously compress signal propagation delay and steadily improve transistor density, which will drive the ongoing evolution of semiconductors and electronic systems.
I saw this clickbait article once about how china was making laser propelled submarines, and the 3D stacking logic chips kind of sounds about as outlandish.
Looking into it, they are "folding" a logic chip to have shorter paths with their SRAMs, which is the main application of 3D integration these days, chucking memory (low-power) above high power logic die.
stacking logic chips is hard because they have to dissipate a lot of power, and stacking them multiplies your power density (which is already very high for the logic die, generally) by the number dies you stack~effectively. Most of the progress on these sorts of things have just been stacking layer on layer of memory on a single logic die.
It looks like they are folding other components other than memory onto the logic die which I haven't seen before, but this isn't cold fusion and even intel has thrusts doing this type of 3D integration.
R&D is difficult and expensive which makes this "logic folding" more impressive. It might not have been a new idea but Huawei, against all the demonization against it over the last 10 years, is commercializing it and that's a huge achievement.
R&D is difficult and expensive which is why the US and Europe gives up on many cutting edge technologies and relies on the tried and true and discounting opportunities. This will be the end of their dominance.
Comments
The latest from Huawei (which is probably the company to watch here) is an idea called "logic folding" which will squeeze more juice out of DUVL by 3D-stacking logic chips.
So far they have announced road maps and benchmarks for their upcoming products using this. A new Kirin-series phone/laptop chip and an Ascend AI accelerator - stated performance comparable to leading US products made with EUVL.
Products are due in August.
HUAWEI Presents the Tau (τ) Scaling Law, Enabling Breakthroughs in Transistor Density and System Performance
https://www.huawei.com/en/news/2026/5/ieee-iscas-tau-scaling
[Shanghai, China, May 25, 2026] Today, at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS), He Tingbo from HUAWEI delivered a keynote speech titled "New Semiconductor Path in Practice". In her speech, she presented the Tau (τ) Scaling Law, a new principle for guiding the future development of the semiconductor industry. This law proposes replacing geometric scaling with time (τ) scaling as a new guiding principle for the evolution of both semiconductors and electronic systems. Based on this principle, innovative technologies such as LogicFolding can be used to continuously compress signal propagation delay and steadily improve transistor density, which will drive the ongoing evolution of semiconductors and electronic systems.
I saw this clickbait article once about how china was making laser propelled submarines, and the 3D stacking logic chips kind of sounds about as outlandish.
Looking into it, they are "folding" a logic chip to have shorter paths with their SRAMs, which is the main application of 3D integration these days, chucking memory (low-power) above high power logic die.
stacking logic chips is hard because they have to dissipate a lot of power, and stacking them multiplies your power density (which is already very high for the logic die, generally) by the number dies you stack~effectively. Most of the progress on these sorts of things have just been stacking layer on layer of memory on a single logic die.
It looks like they are folding other components other than memory onto the logic die which I haven't seen before, but this isn't cold fusion and even intel has thrusts doing this type of 3D integration.
R&D is difficult and expensive which makes this "logic folding" more impressive. It might not have been a new idea but Huawei, against all the demonization against it over the last 10 years, is commercializing it and that's a huge achievement.
R&D is difficult and expensive which is why the US and Europe gives up on many cutting edge technologies and relies on the tried and true and discounting opportunities. This will be the end of their dominance.