Skip to content

Comment on The adder at the heart of Intel's 8087 floating-point chipparent

Comments

Do you know about how many transistors are needed to implement the adder (or the FPU as a whole)? And how it scales with the width of the numbers (16 bit, 32 bit, etc)?

I've been curious about transistor counts for floating point units for a while, but it's hard to find information about them.

I count approximately 2014 transistors (including pull-ups) for the 69-bit adder. Each block of four bits takes approximately 117 transistors.

AboutSource Built by g1lg1l

Hackerly is an independent reader for Hacker News, built on the public HN API. Not affiliated with Y Combinator.