This Cray version isn't so bad - it just requires that if the callee itself calls other subroutines, then it has to save/restore this B00 return address register. You could still support re-entrant routines with this as long as you saved/restored the return address to a software stack rather than a fixed location, but I wonder if Cray compilers typically supported that?
Apparently the reason for using a register vs stack for return address was because memory access (stack) was so much slower.
I'm kinda tempted to use this for the VM I'm designing, which will run on the 6502 8-bit micro. The 6502 doesn't have any 16-bit operations, so pushing and popping using a software defined 16-bit stack pointer is slow, and saving return address to zero page would certainly be faster. It'd mean that rather than always pushing/popping the SP, you only do it in the callee if needed. It's an interesting idea!
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This Cray version isn't so bad - it just requires that if the callee itself calls other subroutines, then it has to save/restore this B00 return address register. You could still support re-entrant routines with this as long as you saved/restored the return address to a software stack rather than a fixed location, but I wonder if Cray compilers typically supported that?
Apparently the reason for using a register vs stack for return address was because memory access (stack) was so much slower.
I'm kinda tempted to use this for the VM I'm designing, which will run on the 6502 8-bit micro. The 6502 doesn't have any 16-bit operations, so pushing and popping using a software defined 16-bit stack pointer is slow, and saving return address to zero page would certainly be faster. It'd mean that rather than always pushing/popping the SP, you only do it in the callee if needed. It's an interesting idea!