RISC-V cemented their own deathsentence when they brought seasoned MIPS software developers into their fold early on.
The calling convention was botched, just like it had been for 10s of different MIPS ones
And it was hyperoptimized before there was existing silicon, just like the SysV AMD64 calling convention was fucked up by Suse developers before there was existing silicon
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RISC-V cemented their own deathsentence when they brought seasoned MIPS software developers into their fold early on.
The calling convention was botched, just like it had been for 10s of different MIPS ones And it was hyperoptimized before there was existing silicon, just like the SysV AMD64 calling convention was fucked up by Suse developers before there was existing silicon