As someone with no hardware experience, I find working with HDLs to be a very different environment and potentially hard to reason with. I did my best to document things from a software perspective (particularly for the Analogue Pocket) (https://github.com/agg23/analogue-pocket-utils/wiki). My code is also running in some capacity in most of the main core ports to the Pocket.
Comments
Very cool project!
Anything surprise you about working on this? Any tips you found about implementing for FPGA?
As someone with no hardware experience, I find working with HDLs to be a very different environment and potentially hard to reason with. I did my best to document things from a software perspective (particularly for the Analogue Pocket) (https://github.com/agg23/analogue-pocket-utils/wiki). My code is also running in some capacity in most of the main core ports to the Pocket.