The flagship is an outlier there since it went from 384bit to 512bit memory. There was no such bus width increase for the rest of the stack so the gains are more modest, 4080 to 5080 is only a 34% improvement.
the solution is people will figure how to burn their models onto ASICs cheaply. apple model on iphone, google model on android, etc. This is tantalizing to businesses (1) you have YOUR company's model on lockdown as you see fit (2) iterations or improvements to the model mean you'll need to buy buy buy
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How would shrinking the processor size help if the current GPU generation is already completely bottlenecked by VRAM bandwidth saturation?
We aren't seeing nearly the same gains on VRAM bandwidth as we are on compute bandwidth
Well, at least this generation almost doubles that bandwidth, right?
The flagship is an outlier there since it went from 384bit to 512bit memory. There was no such bus width increase for the rest of the stack so the gains are more modest, 4080 to 5080 is only a 34% improvement.
"only a 34% improvement" - listen to yourself, man.
It's amazing we still get significant improvements in every generation.
the solution is people will figure how to burn their models onto ASICs cheaply. apple model on iphone, google model on android, etc. This is tantalizing to businesses (1) you have YOUR company's model on lockdown as you see fit (2) iterations or improvements to the model mean you'll need to buy buy buy
The original idea behind shrinking the feature size is to make more money, by getting a greater nuber of chips from the same wafer.