This is true, and as far as I see - this is an inherent limitation. Dedicated, static ASICs will always be faster or more efficient.
However - I think there's some interesting work to be done in hybrid approaches. For example, besides FPGA cells, you can include fast on-board cache, arithmetic units, etc. So, this way, if you're switching between GPU and CPU cores, a subset of that can be reused.
For reference, a typical FPGA cell includes a 1-bit flip-flop and an LUT (look-up table). Flip-flops are memory, LUTs simulate the logic.
Comments
This is true, and as far as I see - this is an inherent limitation. Dedicated, static ASICs will always be faster or more efficient. However - I think there's some interesting work to be done in hybrid approaches. For example, besides FPGA cells, you can include fast on-board cache, arithmetic units, etc. So, this way, if you're switching between GPU and CPU cores, a subset of that can be reused.
For reference, a typical FPGA cell includes a 1-bit flip-flop and an LUT (look-up table). Flip-flops are memory, LUTs simulate the logic.