While I await the days that doing that is possible, my understanding is that FPGAs have a limited number of flashings that are possible. Similar to how Flash-ram has a limit on the write cycles.
I personally would love to have one for doing just this kind of thing for dealing with old software. Think of running old MAC OS stuff on one of these, or even like he's doing right now with the microbee. If done correctly it'd be hardware "accelerated" virtualization of some of the really old hardware.
Most FPGAs store their configuration in SRAM so they don't have any limitations in the number of programmings.
There also exists flash based FPGAs which have the normal flash wearout problem. One time programmable FPGAs also exist but I don't think they are interesting in this application :-)
Awesome I wasn't aware that that was the case these days. Really makes me wish I had something to play with to try to design a "standard" communications layer for handling emulated cpus.
Comments
While I await the days that doing that is possible, my understanding is that FPGAs have a limited number of flashings that are possible. Similar to how Flash-ram has a limit on the write cycles.
I personally would love to have one for doing just this kind of thing for dealing with old software. Think of running old MAC OS stuff on one of these, or even like he's doing right now with the microbee. If done correctly it'd be hardware "accelerated" virtualization of some of the really old hardware.
Most FPGAs store their configuration in SRAM so they don't have any limitations in the number of programmings.
There also exists flash based FPGAs which have the normal flash wearout problem. One time programmable FPGAs also exist but I don't think they are interesting in this application :-)
Awesome I wasn't aware that that was the case these days. Really makes me wish I had something to play with to try to design a "standard" communications layer for handling emulated cpus.