Comment on RP2040 Boot SequenceparentComments−mips_r4300i2yGreat info, and now some chips are supporting Octo-SPI which is even more vendor dependent. At some point we're basically back to parallel flash...−duskwuff2yTBH, a lot of the details are fairly standardized across vendors, and/or are discoverable through SFDP. Parsing the SFDP tables would take a nontrivial amount of program memory, though; I don't know as I'd want to embed that logic in ROM.−gorkish2yThe irony of an 8-bit wide serial bus.... %-#
Comments
Great info, and now some chips are supporting Octo-SPI which is even more vendor dependent. At some point we're basically back to parallel flash...
TBH, a lot of the details are fairly standardized across vendors, and/or are discoverable through SFDP. Parsing the SFDP tables would take a nontrivial amount of program memory, though; I don't know as I'd want to embed that logic in ROM.
The irony of an 8-bit wide serial bus.... %-#