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Comment on Launch HN: SiLogy (YC W24) – Chip design and verification in the cloudparent

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pkkimOP

Hey, good question, thanks.

We speed up developers in two ways: For debugging individual tests, we have a web based log viewer and web based waveform viewer, so you can share test results or look at waves via a URL, instead of opening VNC. More holistically, we're building a chip focused workflow that will make tests first class -- infrastructure to track tests, and by extension measure design health, will be in one place, instead of implemented with a bunch of handrolled, bespoke tooling.

Thank you! So will it be a web-based wave viewer and debugger?

pkkimOP

Those will certainly be a big part of it. But we’ll also be adding a lot more dev friendly tooling around it as well.

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