If you simply try to take a design and make it take a single cycle while using the same area, yes. But usually you can trade off area (and power) for latency, by essentially having redundant logic throughout the operation. That's the point being made: the CPU manufacturers don't really consider it worth pushing this tradeoff (which is often quite non-linear).
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If you simply try to take a design and make it take a single cycle while using the same area, yes. But usually you can trade off area (and power) for latency, by essentially having redundant logic throughout the operation. That's the point being made: the CPU manufacturers don't really consider it worth pushing this tradeoff (which is often quite non-linear).