NOOP sequences in x86 are a fun subject. There's an interesting section in Intel's optimization guide somewhere (I'm too lazy to find it) that details "best practice" noop instructions of 1, 2, ... up to something like 9 bytes. These are used for alignment puposes too, where you need a few bytes of padding to make a loop-back target cache-line aligned or whatnot.
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NOOP sequences in x86 are a fun subject. There's an interesting section in Intel's optimization guide somewhere (I'm too lazy to find it) that details "best practice" noop instructions of 1, 2, ... up to something like 9 bytes. These are used for alignment puposes too, where you need a few bytes of padding to make a loop-back target cache-line aligned or whatnot.
Check out the "smartalign" package in NASM: it contains 1-8 byte nop instructions for several different x86 variants: http://repo.or.cz/w/nasm.git/blob/a2c78555770990ed966c414da9...
You can use xxd and objdump to see which all of these translate into. For example, here's an 8-byte nop for x86-64: