The point of SPI is that it can be implemented with a simple shift register at either end. It's not about bandwidth so much as implementation simplicity.
For SAR[1] ADC's for example, the output can be generated while the ADC conversion is happening. This reduces complexity and latency, and allows you to easily control the sampling time by how fast you clock the SPI bus[2].
If the ADC had to output as text via UART it would need to complete the conversion and then convert the output to characters before stuffing it over an UART with start and stop bits and whatnot. And you'd need some other way to control sampling and conversion time. An internal clock? External, but separate clock? Either way, added complexity.
Comments
The point of SPI is that it can be implemented with a simple shift register at either end. It's not about bandwidth so much as implementation simplicity.
For SAR[1] ADC's for example, the output can be generated while the ADC conversion is happening. This reduces complexity and latency, and allows you to easily control the sampling time by how fast you clock the SPI bus[2].
If the ADC had to output as text via UART it would need to complete the conversion and then convert the output to characters before stuffing it over an UART with start and stop bits and whatnot. And you'd need some other way to control sampling and conversion time. An internal clock? External, but separate clock? Either way, added complexity.
[1]: https://www.maximintegrated.com/en/design/technical-document...
[2]: https://www.microchip.com/en-us/product/MCP3202 (semi-random example, datasheet chapter 5 and figure 5-2)