Historically, each layer of circuits could have a flaws and so yield would drop per layer. With chiplet packaging you might be able to stack some of the chips vertically, if you can handle that much heat.
So for instance how much could you scale performance of a mobile chip by adding more transistors vertically until it has close to the same power draw as a desktop chip?
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Historically, each layer of circuits could have a flaws and so yield would drop per layer. With chiplet packaging you might be able to stack some of the chips vertically, if you can handle that much heat.
So for instance how much could you scale performance of a mobile chip by adding more transistors vertically until it has close to the same power draw as a desktop chip?