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Thanks, I understand that microcode is one of two ways to implement the control unit on a CPU. My question was more of if a CPU only has "a spartan eight hardware instructions" and microcode is used to implement each of those eight hardware instructions how does that allow the ISA to be greater than the original eight instructions?

The microcoded CPU is processing a richer virtual ISA. Have a look at SWEET16 for an analogous 16-bit virtual CPU on an 8-bit CPU: https://en.m.wikipedia.org/wiki/SWEET16

Edit: SWEET16 would run fine on this emulated 6502, too. Inception!

The Apollo guidance computer did something similar.

Also Dann McCreary wrote in 1978 an “8080 Simulator for the 6502” https://www.pagetable.com/?p=824

I now want to use the Javascript-based Gigatron emulator[1] in a browser on a Windows 2000 VM under the jslinux emulator[2]. (I wonder how jslinux would handle a few-year-old version of Firefox...)

Then I can run the Gigatron-based 6502 emulator in that browser to run the 8080 simulator you referenced to run CP/M. Under CP/M I should be able to find a COBOL program to run. I would be achieving an immense coefficient-of-"Inception" and re-enacting "The Birth and Death of all Software" [3] simultaneously.

Doing all of this in Windows NT 4.0 or Linux on my DEC Multia w/ an Alpha CPU would just be icing on the cake.

[1] https://github.com/kervinck/gigatron-rom/tree/master/Contrib...

[2] https://bellard.org/jslinux/

[3] https://www.destroyallsoftware.com/talks/the-birth-and-death...

Very interesting link. I hadn't seen this before, this helps. Thanks.

The microcode here consists of sequences of the eight low-level gigatron hardware instructions, which implement the richer 6502 ISA.

Thanks for the insight. That makes sense. Cheers.

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