I guess I could be more clear. In industrial FPGA applications the goal usually isn't the CPU, the goal is to implement the required logic while keeping the number the gates needed for this to a minimum, and implementing a simple CPU (a.k.a. PSM) is what makes it possible. Same here: the CPU only serves as the economical way to implement something else (another CPU, in this case).
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I guess I could be more clear. In industrial FPGA applications the goal usually isn't the CPU, the goal is to implement the required logic while keeping the number the gates needed for this to a minimum, and implementing a simple CPU (a.k.a. PSM) is what makes it possible. Same here: the CPU only serves as the economical way to implement something else (another CPU, in this case).