A minor correction: as far as I know, none of the modern GPUs or CPUs by Intel, AMD, or Nvidia are barrel processors. The Xeon Phis were the only exception, but I don't know whether they kept that part of the design after KNC.
edit: This document [1] on pages 26-28 describes both execution on pascal and volta GPUs and how they differ. AMD/Intel GPUs are something similar.
I guess I think of SMT as the logical successor to barrel in a way : as long as you can store more state and have independent instruction streams you get a full(er) pipeline.
You're right though that GPU schedulers are more advanced that plain round robin since they work around stalls and issue insns from multiple thread / cycle when the backend can take it.
I have no experience with KNC/KNL, but I wish I did :-)
Comments
A minor correction: as far as I know, none of the modern GPUs or CPUs by Intel, AMD, or Nvidia are barrel processors. The Xeon Phis were the only exception, but I don't know whether they kept that part of the design after KNC.
edit: This document [1] on pages 26-28 describes both execution on pascal and volta GPUs and how they differ. AMD/Intel GPUs are something similar.
[1] http://images.nvidia.com/content/volta-architecture/pdf/volt...
I guess I think of SMT as the logical successor to barrel in a way : as long as you can store more state and have independent instruction streams you get a full(er) pipeline.
You're right though that GPU schedulers are more advanced that plain round robin since they work around stalls and issue insns from multiple thread / cycle when the backend can take it.
I have no experience with KNC/KNL, but I wish I did :-)
No you don't, believe me.