Perhaps predictions from the mid 90's will finally come true: RISC will win and x86 will be held back by its legacy baggage. This is more notable for how long the predictions failed to come true. (The turnabout would make it even more interesting.)
Precisely what baggage is holding x86 back? The only thing that I know of is the variable length instruction encoding and these days, that seems helpful: it allows you to use smaller instructions which benefits caching. The extra cost of decoding instructions on silicon is negligible.
In general, I don't understand your comparison of RISC vs x86. The original premise of RISC, namely having very simple chips that can be clocked real fast because of their simplicity has long since been abandoned. Modern RISC chips have all the crazy complexity of x86 chips: you'll find big pipelines and dynamic register renaming and multiple execution units galore. And modern x86 chips internally look a lot like modern RISC chips as well: after they convert native instructions into micro-ops, there doesn't seem to be much difference.
A part of my point is that it hasn't been holding x86 back for a long time. A part of the article's point is that perhaps it will soon. Reread my comment with a skeptical tone.
Comments
Perhaps predictions from the mid 90's will finally come true: RISC will win and x86 will be held back by its legacy baggage. This is more notable for how long the predictions failed to come true. (The turnabout would make it even more interesting.)
Precisely what baggage is holding x86 back? The only thing that I know of is the variable length instruction encoding and these days, that seems helpful: it allows you to use smaller instructions which benefits caching. The extra cost of decoding instructions on silicon is negligible.
In general, I don't understand your comparison of RISC vs x86. The original premise of RISC, namely having very simple chips that can be clocked real fast because of their simplicity has long since been abandoned. Modern RISC chips have all the crazy complexity of x86 chips: you'll find big pipelines and dynamic register renaming and multiple execution units galore. And modern x86 chips internally look a lot like modern RISC chips as well: after they convert native instructions into micro-ops, there doesn't seem to be much difference.
Precisely what baggage is holding x86 back?
A part of my point is that it hasn't been holding x86 back for a long time. A part of the article's point is that perhaps it will soon. Reread my comment with a skeptical tone.
Ah, thanks for explaining.