You're already seeing domain specific chips, but they're in the form of a FPGA rather than an ASIC. If it can be implementation with traditional gates, a FPGA is the way to go for low to medium volume.
While Lyric may incorporate classic gates in their design, it also sounds like the heart of their technology uses something different from classic gates.
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You're already seeing domain specific chips, but they're in the form of a FPGA rather than an ASIC. If it can be implementation with traditional gates, a FPGA is the way to go for low to medium volume.
While Lyric may incorporate classic gates in their design, it also sounds like the heart of their technology uses something different from classic gates.