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Comment on Deterministic Components for Interactive Distributed Systems

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Looks awesome, any chance the a video of the presentation is, or will be available?

It is also worth noting this seems like it relates to the way hardware RTL (VHDL/Verilog) designers basically build and test their systems. I think that software developers in general have a few things to learn from the hardware guys about testing.

I think that software developers in general have a few things to learn from the hardware guys about testing.

People say that a lot, but do you have any concrete suggestions?

I find there's a big difference between testing when it's half your budget (HW), and when it's 10 or 20% (SW).

Are you sure?

http://insights.sigasi.com/opinion/jan/verilogs-major-flaw.h...

(tl;dr Verilog itself is non-deterministic)

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