Demand mostly. Also the way ARM does I/O is a bit different, that said, a memory mapped "smart" disk controller is pretty straight forward, the trick is getting access to the memory bus crossbar switch inside the chip. Bolting one on, all of your peripherals go through one memory bus.
What would be really interesting is if ARM introduces a way to use a high speed serial bus (think PCIe) which would allow for the development of a 'south bridge' type IO chipset for ARM machines.
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Demand mostly. Also the way ARM does I/O is a bit different, that said, a memory mapped "smart" disk controller is pretty straight forward, the trick is getting access to the memory bus crossbar switch inside the chip. Bolting one on, all of your peripherals go through one memory bus.
What would be really interesting is if ARM introduces a way to use a high speed serial bus (think PCIe) which would allow for the development of a 'south bridge' type IO chipset for ARM machines.